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NXP Semiconductors /MIMXRT1021 /OCOTP /HW_OCOTP_SCS

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Interpret as HW_OCOTP_SCS

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (jtag_dbg_dis)HAB_JDE 0SPARE0 (unlocked)LOCK

HAB_JDE=jtag_dbg_dis, LOCK=unlocked

Description

Software Controllable Signals Register

Fields

HAB_JDE

HAB JTAG Debug Enable

0 (jtag_dbg_dis): JTAG debugging is not enabled by the HAB (it may still be enabled by other mechanisms).

1 (jtag_dbg_en): JTAG debugging is enabled by the HAB (though this signal may be gated off).
SPARE

Spare
LOCK

Lock

0 (unlocked): Bits in this register are unlocked.

1 (locked): Bits in this register are locked. When set, all of the bits in this register are locked and can not be changed through SW programming. After this bit is set, it can only be cleared by a POR.

Links

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Register License

Copyright 2016-2020 NXP All rights reserved.

SPDX-License-Identifier: BSD-3-Clause

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data